Previous: Sparc Features, Up: Standard Target Features [Contents][Index]
The ‘org.gnu.gdb.tic6x.core’ feature is required for TMS320C6x targets. It should contain registers ‘A0’ through ‘A15’, registers ‘B0’ through ‘B15’, ‘CSR’ and ‘PC’.
The ‘org.gnu.gdb.tic6x.gp’ feature is optional. It should contain registers ‘A16’ through ‘A31’ and ‘B16’ through ‘B31’.
The ‘org.gnu.gdb.tic6x.c6xp’ feature is optional. It should contain registers ‘TSR’, ‘ILC’ and ‘RILC’.